The present invention relates to a semiconductor memory system, and in particular, to a memory system including a shared interface for semiconductor memories.
In many applications utilizing semiconductor memories, often flash memory and random access memory (RAM) are utilized within the same system. For example, many mobile applications, such as cellular phones, used NAND flash memory to store code and use low-power RAM to allow execution at faster speeds. For example, low-power single data rate (LP-SDR) or low-power double data rate (LP-DDR) can be provided to allow fast speed execution, while a NAND or NOR flash memory may be provided to store code. In many memory subsystems with multimedia functions, which are increasingly popular in many mobile applications, this combination of NAND flash and LP-DDR or LP-SDR memories have become quite common.
In many applications, including mobile applications, there is an every increasing drive to minimize size of all components, including memory components. Although there are advantages to including both flash memory and LP-SDR or LP-DDR memories providing both types of memory, typically involved providing access from a host processor to each of the memory devices over an external memory bus. Each external memory bus will occupy a number of pins and space on the printed circuit board.
For these and other reasons, there exists a need for the present invention.